Intern Layout Engineer
Renesas Electronics
- Львів
- Стажування
- Повна зайнятість
- Layout design of simple IC blocks.
- Layout verification using LVS, DRC, ERC and other required verification tools.
- Demonstrates an ability to learn new tool features and procedures.
- Attend training courses.
- Build up your knowledge and improve your skills using your own research.
- University students at Electrical Engineering or related disciplines.
- Preferably university experience in design of analog/digital circuits or PCB layout.
- Understanding of semiconductor physics, basic electrical properties and HW design workflow.
- Ability to prioritize work, set goals and meet deadlines.
- Self-motivated and take full responsibility for solutions.
- Good written, communication and teamwork skills.
- Pre-Intermediate English.
- Familiarity with Cadence Virtuoso (Layout Suite and other), Unix, Altium Designer, OrCAD.
- Knowledge of transistor-level integrated circuits including device level cross section.
- Fixed-Term Contract - duration approx. 6 months.
- Friendly and highly professional team.
- Calendar days paid vacation.
- Flexible working hours.
- Professional & personal growth.