FEOL Integration R&D Engineer - Platform & Operations Efficiency Team

• Work in the Platform Efficiency Department as a FEOL Integration Engineer.
• Flow platformization of advanced logic flows. Gate-All-Around structures and more advanced designs. Take the basic research flow and status, and drive improvement in consistency, uniformity, and stability. Apply known techniques or standards from industry to improve the effectiveness of the basic flow, and the stability of the individual and integrated processes.
• Module Synergy activity: working on modules which are used across several of the programs at IMEC. Determine the optimal processes and conditions to provide consistently effective results, utilizing windowing and process margin understanding.
• Legacy technology improvement and tech transfer: Support 28nm and 14nm technology flows at IMEC, to strengthen the performance and stability. Utilize these legacy flows to strengthen the connection between imec and the larger semiconductor industry. Work with customer collaboration to setup established technology node processes at customer sites, expanding the width of the semiconductor industry.
• Be able to explain and discuss process technology with external customers, respond to questions with concise direct answers. Work to strengthen information needed for technology transfers.
• Setting up and carrying out development plans. This includes defining the design of experiment, defining the in-line characterization strategy, following-up the processing in the imec pilot line, and analyzing and discussing the incoming data.
• Discuss process splits with the characterization and/or process step development engineers, to implement the splits into the process flow and take care of the follow-up in imec's 300mm FAB.
• Leverage industry experience to window and corner test modules, working to establish optimal settings which work across major program families which are inherently dissimilar, and have their own unique needs.

• 3+ years of industry experience in a production or development environment.
• Candidates with only post-doctoral experience will not be considered.
• Strong preference for GAA integration experience. Minimum of Logic device Integration engineering direct experience, for FEOL structures / concepts from isolation, gate, source/drain, epitaxial S/D.
• Direct experience with CMOS transistor operation, ability to interpret electrical test data of N and P mos transistors.
• Capability to manage time independently, balancing needs of multiple parallel activities.
• You like looking at data, drawing conclusions and proposing relevant follow up actions.
• Ability to draw conclusions from limited data, make suggestions on how to validate assumptions and conclusions.
• Good communication is a major requirement for this job, with interactions with groups within the department, as well as with other departments and Fab Operations.
• You have strong organizational skills and show the flexibility to change between different projects according to changing priorities.
• Given the international character of imec, excellent English verbal and written communication skills are required to be effective in this position.
• Willingness to relocate physically to Leuven, Belgium.

EURAXESS