Cadence Design Systems - Pune, Maharashtra
. Location : Pune Design Engineer II Experience in developing complex test bench in System Verilog using OVM/UVM methodology... skills necessary Job Role: He/She will be a part of design verification team supporting the DNA (Deep Neural Accelerator...
April 4
Cadence Design Systems - Pune, Maharashtra
knowledge of DDR4/5, LPDDR4/5 IP. Hands on design/verification experience on DDR protocol Exposure to DDR Integration... and Verification at SOC Level Exposure to Silicon Bring-up/Testing for DDR. Hands on design/verification experience on AMBA based...
March 23
Cadence Design Systems - Pune, Maharashtra
+ Year ASIC Design / Verification experience. Required Expertise in PCIe Design and Verification domain. Good debug skills...
March 15
Cadence Design Systems - Pune, Maharashtra
++ Year ASIC Design / Verification experience. Required Expertise in PCIe / Storage (ONFI, XSPI, SD/eMMC) Design...
March 15
Sr. Design Engineer - Interiors Cockpit
Tata Technologies - Pune, Maharashtra
Job Description: Scope of Role The Sr.CAD Engineer is responsible for generating CATIA V5 Body Engineering CAD... for the design and development of IP topper pad,IP structure, Glove Box ,Driver side lower, Air vent ,ducts, Defrost grille...
May 17