Sr Staff Design Engineer
Lattice Semiconductor
- Pune, Maharashtra
- Permanent
- Full-time
- This is a full-time individual contributor position located in Pune, India.
- The role will focus on FPGA projects concentrated in Pune and similar time zones.
- The qualified candidate will be an expert in RTL design, best-in-class coding styles, algorithms, and both Verilog and System Verilog.
- The position will exercise many standard tools including Verilog simulations, lint, CDC; and will extend into synthesis, static timing, and DFT.
- The successful candidate will be open and willing to both (a) teach best-known-methods to an existing FPGA team and (b) learn from the team about the particular complications of highly programmable FPGA fabrics. This role carries the need to be both a strong educator and a open-minded student.
- Serve as a key contributor to FPGA design efforts.
- Drive logic design of key FPGA blocks and bring best-in-class methodologies to accelerate design time and improve design quality.
- Ensuring design quality through assertions, checkers, and scripting.
- Develop strong relationships with worldwide teams.
- Mentor and develop strong partners and colleagues.
- Occasional travel as needed.
- BS/MS/PhD Electrical Engineering, Computer Science, Computer systems degree or equivalent.
- 12+ years of experience in driving logic design across a multitude of silicon projects.
- Familiarity with FPGA designs, use-cases, and design considerations is a plus.
- Independent worker with demonstrated problem-solving abilities.
- Proven ability to work with multiple groups across different sites and time zones.