Experience on development of complex software projects Strong background in C/C++ Strong background in data structures and algorithms Basic knowledge of python and tcl Good analysis and problem-solving skills Typically requires a minimum of 5+ years of related experience Full understanding of specialization area plus working knowledge of multiple related areas Familiarity with ASIC design flow and the EDA tools and methodologies used therein Basic knowledge of Verilog/VHDL semantics Preferred Experience Familiarity with ISO 26262, IEC 61508 Understanding of Distributed Processing, fault models, Verilog, System Verilog and testbench. Fault Testing and diagnosis in digital circuit concepts. Responsible for designing, developing, troubleshooting, or debugging software programs Independently resolves a wide range of issues in creative ways on a regular basis Customarily exercises independent judgment in selecting methods and techniques to obtain solutions Performs in project leadership role Contributes to complex aspects of a project Determines and develops approach to solutions Provides regular updates to manager on project status Represents the organization on business unit and/or company-wide projects Guides more junior peers with aspects of their job Frequently networks with senior internal and external personnel in own area of expertise
