HRS2024/204 Post-Doc on Advanced Circuits and Methods for Heterogeneous Integration

  • Madrid
  • 36.000 € al año
  • Permanente
  • Tiempo completo
  • Hace 27 días
Offer Description- Design space exploration for architectures beyond a single chip.- Design tradeoffs: thermal, performance, power, etc.- Validation, verification, and testing of heterogeneous systems.RequirementsResearch Field Engineering » Other Education Level PhD or equivalentResearch Field Computer science » Other Education Level Master Degree or equivalentSkills/QualificationsPhD degree in Electrical and Electronics Engineering or Telecommunication.Specific Requirements- Background on design of mixed-signal or RF circuits.- Valuable knowledge of comercial design tools like Cadence / Synopsys.- Competence in digital architectures and digital system design with HDLs (Verilog or VHDL).- Knowledge heterogeneous integration or chiplet design.Languages ENGLISH Level ExcellentLanguages SPANISH Level GoodAdditional InformationBenefitsThe contract includes a gross salary of 36000 €, and full social benefits in Spain. Conference,summer school and workshop registration fees will be also covered.The contracted researcher will work in a joint program with the company INDRA, an internationalSpanish-based company, within the project “Chair UPM-INDRA in microelectronics”.Selection processSe aplican las pautas establecidas en el proceso de selección del nuevo Reglamento para el proceso de selección ycontratación del personal investigador, personal técnico y personal gestor relacionado con la investigación de laUniversidad Politécnica de Madrid, aprobado en la UPM.The contract includes a gross salary of 36000 €, and full social benefits in Spain. Conference,summer school and workshop registration fees will be also covered.The contracted researcher will work in a joint program with the company INDRA, an internationalSpanish-based company, within the project “Chair UPM-INDRA in microelectronics”.- Academic records at master's and PhD's levels.- Previous experience in the design of electronic circuits.- Motivation for working in the program and abilities for dissemination, writing scientific papers,and presenting to public audiences, among others.Additional commentsMinisterio para la Transformación Digital y de la FunciónPública, Next Generation EU, Plan de Recuperación, Transformación y ResilenciaWork Location(s)Number of offers available 1 Company/Institute Information Processing and Telecommunication Center (IPTC), ETSI Telecomunicación Country Spain State/Province Madrid City Madrid Postal Code 28040 Street Avda. Complutense, 30Where to apply E-mailr.jevtic@upm.esContact State/ProvinceMadrid CityMadrid WebsiteStreetC/ Ramiro de Maeztu, 7 Postal Code28040 E-Mailr.jevtic@upm.esSTATUS: EXPIRED

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