Cadence Design Systems - Pune, Maharashtra
. Location : Pune Design Engineer II Experience in developing complex test bench in System Verilog using OVM/UVM methodology... skills necessary Job Role: He/She will be a part of design verification team supporting the DNA (Deep Neural Accelerator...
April 4
Cadence Design Systems - Pune, Maharashtra
's or Master's degree in ECE or equivalent Proficiency in computer architecture and hardware design Experience in Object-Oriented... along with functional coverage and assertion-based verification methodologies Exposure to design and verification tools, and methodologies...
April 26
Cadence Design Systems - Pune, Maharashtra
knowledge of DDR4/5, LPDDR4/5 IP. Hands on design/verification experience on DDR protocol Exposure to DDR Integration... and Verification at SOC Level Exposure to Silicon Bring-up/Testing for DDR. Hands on design/verification experience on AMBA based...
March 23
Cadence Design Systems - Pune, Maharashtra
+ Year ASIC Design / Verification experience. Required Expertise in PCIe Design and Verification domain. Good debug skills...
March 15
Cadence Design Systems - Pune, Maharashtra
++ Year ASIC Design / Verification experience. Required Expertise in PCIe / Storage (ONFI, XSPI, SD/eMMC) Design...
March 15