Design Validation Engineer
Lattice Semiconductor
- San Jose, CA
- $106,000-141,000 per year
- Permanent
- Full-time
- Plan, Develop, and Execute Validation and Characterization of Lattice Integrated Circuit (IC) products from tape-out through release to production
- Drive new silicon product bring-up, debug, and characterization to determine product performance and design vulnerabilities
- Develop innovative test methodologies and define robust validation and characterization plans to ensure Lattice brings high quality products to the market
- Design test hardware system including PCB schematic capture, collaborating with PCB layout engineers, and managing fab/assembly vendors
- Drive and develop improvments in validation methodologies and processes
- Support product design failure analysis as required to resolve any device related problems.
- BS/MS/PhD Electrical Engineering or Computer Science
- 3+ yrs experience validating silicon products
- Experience with Verilog/VHDL and design implementation using FPGA development tools
- Experience in test automation development using programming languages such as Python, Perl
- Knowledge of statistical analysis concepts and use of analysis tools such as JMP, R.
- Proficiency with lab equipment for device characterization such as BERT, VNA, Oscilloscope, Protocol Exervciser/Analyzer
- Strong written and verbal communication skills and the ability to work with cross functional teams.
- Must be detail oriented with strong customer service skills.
- High level of PC and UNIX skills with knowledge of MS Office Suite.