Sr. Manager Silicon Design Engineering
Advanced Micro Devices
- Hyderabad, Telangana
- Permanent
- Full-time
- Manage and lead a team of design verification engineers with focus on mixed-signal IP (MSIP) verification domain.
- Own the plan and lead the verif team activities on functional verification execution from test plan to verification signoff. Planning includes resource estimation and allocation to ensure high confidence execution.
- Collaborate with MSIP architects and designers to understand the IP and/or Sub-System features.
- Write/Implement/Review Test Plans for all layers of the design including digital, mixed signal and analog parts.
- Verification of critical high speed digital designs using coverage driven random and directed testing techniques as well as Formal Verification.
- Own all aspects of the Verification flow from initial test planning to coverage convergence and sign-off for one or more IP.
- Build testbench components as well as test and sequence libraries, by applying Objected Oriented Programming Verification techniques following UVM methodology.
- Conduct and participate in Test Reviews for each plan milestone, including tapeout readiness reviews.
- Technical leadership, including driving IP projects from start to the finish and Design verification sign-off.
- Proven experience in verifying commercially successful IPs, Sub-Systems or SoCs.
- Strong ability to provide mentorship and guidance to junior and senior engineers, a very effective team player, must have strong technical management skills and provide a positive influence on team morale and culture.
- Experience with work and task breakdown and planning, and IP project management.
- Must be expert in SystemVerilog, UVM.
- Proficient in object-oriented programming, scripting (Shell/Python/Perl/Tcl/Ruby), and low-level programming languages.
- Deep system architecture knowledge of Memory Systems(DDR/LPDDR/HBM),high speed I/O interconnects technologies (UCIE, …) and PHYs desirable.
- Excellent knowledge of standard bus interface protocols (i.e., RDI, PIPE, DFI etc).
- Experience in Verification of Multi-Voltage Domain designs
- Analog/Digital co-verification experience a plus including Industry verification experience with Mixed-Signal blocks and SOCs.
- Expertise building/using Mixed-Signal testbenches, checkers and tests using System Verilog and in creating and/or using real-numbered analog behavioral models in System Verilog/Verilog-AMS are highly desirable.
- Self-motivated, disciplined, organized, and detailed orientated. Able to drive independently to solve problems and to be collaborative with the global org/global AMD design community to identify optimum solutions to novel problems. Strike the right balance between the speed and quality of required decisions.
- Strong communications, time management and presentation skills combined with broad technical skills. This is a highly visible role in which the team will look to you as the guide for leading execution and design activities on a day-to-day basis.
- PhD/MS/BS in Electrical Engineering or Computer Engineering or related equivalent