Principal / Senior Principal Circuit Design Engineer / Layout Engineer
Northrop Grumman
- Linthicum, MD
- Permanent
- Full-time
- Create custom designs and layouts that could include Process Control Monitor (PCM) structures, reticle alignment marks, and physical measurement structures. Mentoring and guidance are provided by process engineers, photo lithography engineers and peer engineers.
- Provide floor planning guidance and support.
- Create chip designs in various technologies for process prove-in, experimentation, and test support.
- Perform both frontend and backend verification of designs.
- Participate in reticle composition and tape out activities.
- Document work performed.
- Experience using Cadence design suite of tools to perform full and semi-custom design work.
- Knowledge of Cadence Virtuoso L/XL/EXL capabilities that enhance design task efficiency.
- Knowledge of semiconductor device physics and analog/mixed signal integrated circuit design.
- Experience laying out or characterizing digital standard cells or memory elements.
- Design simulation using industry tools such as ANSYS/HFSS or ADS.
- Building scripts, in an agreed upon programing language, to automate repetitive tasks or facilitate an increase in productive work.
- Create and document flows for future re-use and quality control.
- Knowledge of an industry programing language: Shell, Python, Perl, TCL/TK or equivalent.
- Experience with any of the following:
- Behavior modeling skills using Verilog-A or Verilog-AMS.
- Full-chip functional/performance verification methods.
- Experience collaborating with research staff/quantum physicists to realize proof of principle designs.
- Bachelor’s Degree in a STEM related field with 5 years of related experience; 3 years with Masters; 0 years with PhD or 10 year's circuit design experience in lieu of a STEM degree.
- Excellent verbal, written, and interpersonal communication skills.
- Navigate file structures in the LINUX environment.
- Able to obtain and maintain a DoD security clearance per business requirements.
- US Citizenship.
- Bachelor’s Degree in a STEM related field with 9 years of related experience; 7 years with Masters; 4 with a PhD or 10 year's circuit design experience in lieu of a STEM degree.
- Excellent verbal, written, and interpersonal communication skills.
- Navigate file structures in the LINUX environment.
- Able to obtain and maintain a DoD security clearance per business requirements.
- US Citizenship.
- Understanding of the Semiconductor fabrication process and process development.
- Understanding of Process Design Kit (PDK) Development (tech files, verification rule files, Pcells, skill programing)
- Skilled in the use of the Cadence Virtuoso capture tool.
- Proficient in the use of Cadence ASSURA or Siemens Mentor Calibre DRC/LVS verification tools.
- Experience in Superconducting Reciprocal Quantum Logic circuit design practices
- Current Secret/TS SCI clearance