Senior ASIC Physical Design PPA Engineer
Nvidia - Santa Clara, CA
We are now looking for a motivated Senior ASIC Physical Design PPA (Performance, Power, Area) Engineer... inventiveness and intelligence. What you'll be doing: Drive physical design and timing of high-frequency and low-power designs...
March 7
Senior ASIC Floorplan Design Engineer
Nvidia - Santa Clara, CA
We are now looking for a Senior ASIC Floorplan Design Engineer! NVIDIA is seeking a talented ASIC Floorplan Engineer..., interconnect and floorplan improvement opportunities Solve timing and routing congestion issues with physical and ASIC design...
March 27
Camera Imaging ASIC Design Engineer
Qualcomm - Santa Clara, CA - $133,000-199,000 per year
Engineering General Summary: The Multimedia Camera HW team is looking for strong ASIC design engineer for an exciting... implementation of Image Processing Camera IP Experience working with synthesis and physical design teams TCL/Perl/Python/shell...
March 26
ASIC Design Engineer - Memory Cache Controller
Apple - Santa Clara, CA
. Work with physical design team to close timing of the same. Education & Experience Education & Experience Bachelors..., we are presented with design challenges exacerbated by clients with varying but simultaneous needs such as real-time, low latency...
February 3
Nvidia - Santa Clara, CA
. We are looking for a Senior ASIC Timing Engineer to join our dynamic and growing team! If you are problem solver and highly motivated individual... experience in Physical design/Timing. Experience in full-chip/sub-chip Static Timing Analysis (STA), timing constraints...
March 20