RTL Design Engineer - Senior (US)
Experis - Santa Clara, CA
Location: Onsite San Jose, CA JOB DUTIES: Responsible for RTL design using Verilog HDL for implementation and debug. Read and comprehend System on Chip level architectural specification. Write microarchitecture specification for new and m...
May 3
Senior Privacy Engineer and Compliance Manager
Abbott - Santa Clara, CA
for diversity, working mothers, female executives, and scientists. The Opportunity The Senior Privacy Engineer and Compliance... control systems, compliance and processes to fulfill commercial needs. Senior Privacy Engineer and Compliance Manager...
April 9
Nvidia - Santa Clara, CA
ASIC engineer to join the team. The Team is responsible for crafting all aspects of SOC clocking. The team collaborates... in the lab. What you'll be doing: As a Clocks team member, you will be collaborating with other architects, ASIC...
May 10
Senior ASIC Verification Engineer
Nvidia - Santa Clara, CA
The NVIDIA Clocks Team is looking for an excellent Senior ASIC Verification engineer with extensive experience in... SOC and GPU ASIC. The complexity of the clocks and resets design has increased many folds. This requires sophisticated...
May 10
Senior ASIC Floorplan Design Engineer
Nvidia - Santa Clara, CA
We are now looking for a Senior ASIC Floorplan Design Engineer! NVIDIA is seeking a talented ASIC Floorplan Engineer... during early chip development. Drive the area review process and collaborate with the ASIC design team to identify area...
March 27