Talent Staffing Services - Santa Clara, CA
Design Verification Engineer Location: Santa Clara, CA Responsibilities: Architect and Create verification... of Register Transfer Level and Gate simulations and resolve them by working with design engineers. Create low power testcases...
May 22
iTech - Santa Clara, CA
Role: Design Verification Engineer Work Location: Santa Clara, CA Background check: Mandatory Meet and great... and resolve them by working with design engineers. Create low power testcases using UPF or CPF to verify the desired power intent...
May 16
OmniVision - Santa Clara, CA - $126,984-130,000 per year
chip bring-up, validation, and debugging using FPGA and Python. Define the block level design document such as interface...Conduct image sensor array/analog related timing control design and Image Signal Processing (ISP) system level...
April 4
OmniVision - Santa Clara, CA - $110,600-135,000 per year
performance and low power design techniques. Knowledge of FPGA and emulation platforms. Knowledge of SOC architecture...Minimum MSEE, or equivalent OR BSEE, or equivalent, plus 2 years of digital design experience Familiar with digital...
May 23
OmniVision - Santa Clara, CA - $126,984-130,000 per year
analysis, and formality. High performance and low power design techniques. FPGA and emulation platforms. SOC architecture...Be responsible for digital design of image sensor, SoC integration and IP design, analysis, integration, and validation...
April 3