Principal Design Engineer – Memory Modeling Portfolio
Cadence Design Systems - Hsinchu City
. As a Principal Design Engineer you will be responsible for scheduling, designing, developing, and supporting IP models of system..., and supporting existing system level memory model products. Perform as individual contributor for RTL design, verification...
March 5
Principal Design Engineer – Memory Modeling Portfolio
Cadence Design Systems - Hsinchu City
. As a Principal Design Engineer you will be responsible for scheduling, designing, developing, and supporting IP models of system..., and supporting existing system level memory model products. Perform as individual contributor for RTL design, verification...
February 8
Staff Engineer, Physical Design - Hsinchu
Morgan Philips - Hsinchu City
Staff Engineer, Physical Design What You'll Do: Engage in hands-on physical design and verification tasks.... Execute physical design tasks including floor-planning, place and route, clock tree synthesis (CTS), timing closure, IR...
April 2
Intel - Hsinchu City
on the ATE. As a Frontend IP design engineer, you will be involved in architecting, implementing and verifying digital IP...Job Details: Job Description: Develops the logic design, register transfer level (RTL) coding, simulation...
March 14
Senior Mask Layout Design Engineer
Nvidia - Hsinchu City
We are looking for a Senior Mask Layout Design Engineer – someone who is excited to join a growing group of diverse... layout and verifying against design rules and schematics. What we need to see: BSEE or equivalent experience Minimum...
March 14