Sr Digital Verification Engineer
Renesas Electronics - Jhubei, Hsinchu County
: Define testbench infrastructure using SystemVerilog, UVM and Formal. Responsible for complete digital level verification.... Modeling of analog functions in SystemVerilog. Responsible for complete chip level verification of mixed signal IC. Work...
June 2
Staff Digital Verification Engineer
Renesas Electronics - Jhubei, Hsinchu County
digital level verification. Modeling of analog functions in SystemVerilog. Responsible for complete chip level verification... of mixed signal IC. Work closely with design team to architect a new design verification environment and produce high quality...
June 2
Staff Digital Verification Engineer
Renesas Electronics - Jhubei, Hsinchu County
infrastructure using SystemVerilog, UVM and Formal. Responsible for complete digital level verification. Modeling of analog... functions in SystemVerilog. Responsible for complete chip level verification of mixed signal IC. Work closely with design team...
May 26
Silicon Design Verification Engineer
Advanced Micro Devices - Hsinchu City
_ THE ROLE: For all stages of verification on IP, including developing testbench, model, assertions/checkers/monitors... development and verification Building testbench, creating test plan and debugging regression Apply necessary verification...
April 9
ASIC Verification Engineer - Hardware
Nvidia - Hsinchu City
NVIDIA SOC System-ASIC team is hiring a verification engineer. In this role, you will work closely with Arch, design... and verification engineers to thoroughly verify some top-level related control units (like: Fuse/Floorsweep, Strap, Reset, Sysctrl...
June 9